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<Chip-scale Coherent Ising Machine>

 Combinatorial optimization problems (COPs) are ubiquitous in our society, and play central roles in diverse applications such as drug discovery, integrated circuit design, artificial intelligence, and path planning for autonomous vehicles. Large sets of COPs are difficult to solve even with the state-of-the-art computing technologies. It is also well known that large portion of COPs can be mapped to the Ising model which is a mathematical model for ferromagnetism that describes behaviors of spin networks and their phase transitions. Problems of finding the ground state of the Ising model are called “Ising problems”. The Ising problem can be reduced to the Ising model within polynomial time. Therefore, if one can devise a dedicated hardware that emulates the behavior of Ising model, i.e. Ising machine, there will be a tremendous impact on solving COPs with reasonable amount of resources (e.g. time, energy consumption) for diverse applications. Throughout this project, we will build a chip-scale Ising machines which outperforms the state-of-the-art Ising machines in nearly all aspects.

- T. J. Seok# , N. Quack, S. Han, R. S. Muller, and M. C. Wu*, “Large-scale broadband digital silicon photonic switches with vertical adiabatic couplers,” Optica, Vol. 3, 64-70 (2016)

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